3PL_ALWAYS_INLINE plSimdVec4u::plSimdVec4u()
5 PL_CHECK_SIMD_ALIGNMENT(
this);
7#if PL_ENABLED(PL_MATH_CHECK_FOR_NAN)
8 m_v = vmovq_n_u32(0xCDCDCDCD);
12PL_ALWAYS_INLINE plSimdVec4u::plSimdVec4u(plUInt32 xyzw)
14 PL_CHECK_SIMD_ALIGNMENT(
this);
16 m_v = vmovq_n_u32(xyzw);
19PL_ALWAYS_INLINE plSimdVec4u::plSimdVec4u(plUInt32 x, plUInt32 y, plUInt32 z, plUInt32 w)
21 PL_CHECK_SIMD_ALIGNMENT(
this);
23 alignas(16) plUInt32 values[4] = {x, y, z, w};
24 m_v = vld1q_u32(values);
32PL_ALWAYS_INLINE
void plSimdVec4u::Set(plUInt32 xyzw)
34 m_v = vmovq_n_u32(xyzw);
37PL_ALWAYS_INLINE
void plSimdVec4u::Set(plUInt32 x, plUInt32 y, plUInt32 z, plUInt32 w)
39 alignas(16) plUInt32 values[4] = {x, y, z, w};
40 m_v = vld1q_u32(values);
43PL_ALWAYS_INLINE
void plSimdVec4u::SetZero()
49PL_ALWAYS_INLINE plSimdVec4i::plSimdVec4i(
const plSimdVec4u& u)
54PL_ALWAYS_INLINE plSimdVec4u::plSimdVec4u(
const plSimdVec4i& i)
59PL_ALWAYS_INLINE
plSimdVec4f plSimdVec4u::ToFloat()
const
61 return vcvtq_f32_u32(m_v);
67 return vcvtq_u32_f32(f.m_v);
71PL_ALWAYS_INLINE plUInt32 plSimdVec4u::GetComponent()
const
73 return vgetq_lane_u32(m_v, N);
76PL_ALWAYS_INLINE plUInt32 plSimdVec4u::x()
const
78 return GetComponent<0>();
81PL_ALWAYS_INLINE plUInt32 plSimdVec4u::y()
const
83 return GetComponent<1>();
86PL_ALWAYS_INLINE plUInt32 plSimdVec4u::z()
const
88 return GetComponent<2>();
91PL_ALWAYS_INLINE plUInt32 plSimdVec4u::w()
const
93 return GetComponent<3>();
96template <plSwizzle::Enum s>
97PL_ALWAYS_INLINE
plSimdVec4u plSimdVec4u::Get()
const
99 return __builtin_shufflevector(m_v, m_v, PL_TO_SHUFFLE(s));
104 return vaddq_u32(m_v, v.m_v);
109 return vsubq_u32(m_v, v.m_v);
114 return vmulq_u32(m_v, v.m_v);
119 return vorrq_u32(m_v, v.m_v);
124 return vandq_u32(m_v, v.m_v);
129 return veorq_u32(m_v, v.m_v);
132PL_ALWAYS_INLINE
plSimdVec4u plSimdVec4u::operator~()
const
134 return vmvnq_u32(m_v);
137PL_ALWAYS_INLINE
plSimdVec4u plSimdVec4u::operator<<(plUInt32 uiShift)
const
139 return vshlq_u32(m_v, vmovq_n_u32(uiShift));
142PL_ALWAYS_INLINE
plSimdVec4u plSimdVec4u::operator>>(plUInt32 uiShift)
const
144 return vshlq_u32(m_v, vmovq_n_u32(-uiShift));
149 m_v = vaddq_u32(m_v, v.m_v);
155 m_v = vsubq_u32(m_v, v.m_v);
161 m_v = vorrq_u32(m_v, v.m_v);
167 m_v = vandq_u32(m_v, v.m_v);
173 m_v = veorq_u32(m_v, v.m_v);
177PL_ALWAYS_INLINE
plSimdVec4u& plSimdVec4u::operator<<=(plUInt32 uiShift)
179 m_v = vshlq_u32(m_v, vmovq_n_u32(uiShift));
183PL_ALWAYS_INLINE
plSimdVec4u& plSimdVec4u::operator>>=(plUInt32 uiShift)
185 m_v = vshlq_u32(m_v, vmovq_n_u32(-uiShift));
191 return vminq_u32(m_v, v.m_v);
196 return vmaxq_u32(m_v, v.m_v);
201 return vceqq_u32(m_v, v.m_v);
206 return vmvnq_u32(vceqq_u32(m_v, v.m_v));
211 return vcleq_u32(m_v, v.m_v);
216 return vcltq_u32(m_v, v.m_v);
221 return vcgeq_u32(m_v, v.m_v);
226 return vcgtq_u32(m_v, v.m_v);
232 return vmovq_n_u32(0);
239 uint32x4x2_t P0 = vzipq_u32(v0.m_v, v2.m_v);
240 uint32x4x2_t P1 = vzipq_u32(v1.m_v, v3.m_v);
242 uint32x4x2_t T0 = vzipq_u32(P0.val[0], P1.val[0]);
243 uint32x4x2_t T1 = vzipq_u32(P0.val[1], P1.val[1]);
A 4-component SIMD vector class.
Definition SimdVec4f.h:8
A SIMD 4-component vector class of signed 32b integers.
Definition SimdVec4i.h:9
A SIMD 4-component vector class of unsigned 32b integers.
Definition SimdVec4u.h:7
static plSimdVec4u MakeZero()
Creates an plSimdVec4u that is initialized to zero.
Definition FPUVec4u_inl.h:313
A 4-component vector class.
Definition Vec4.h:9